Renesas H8S Series Hardware Manual page 907

ETCR0B—Transfer Count Register 0B
Bit
ETCR0B
Initial value
Read/Write
Sequential
mode and
idle mode
Repeat mode
Block transfer
mode
Note: Not used in normal mode.
MAR1AH—Memory Address Register 1AH
MAR1AL—Memory Address Register 1AL
Bit
MAR1AH
Initial value
Read/Write
Bit
MAR1AL
Initial value
Read/Write
IOAR1A—I/O Address Register 1A
Bit
IOAR1A
Initial value
Read/Write
:
15 14 13 12
:
:
* * * *
:
R/W R/W R/W R/W R/W
Transfer number storage register
:
31 30 29 28 27
:
— — — — —
:
0 0 0 0
:
— — —
— —
:
15 14 13 12 11
:
:
* * * *
:
R/W R/W R/W R/W R/W
In short address mode: Specifies transfer source/transfer destination address
In full address mode: Specifies transfer source address
:
15 14 13 12
:
:
* * * *
:
R/W R/W R/W R/W R/W
In short address mode: Specifies transfer source/transfer destination address
In full address mode: Not used
H'FEEE
11 10 9 8 7
* * * * *
R/W R/W R/W R/W
Transfer counter
Block transfer counter
H'FEF0
H'FEF2
26 25 24 23
— — —
0 0 0 0 *
— — — R/W
10 9 8 7
* * * * *
R/W R/W R/W R/W
H'FEF4
11 10 9 8 7
* * * * *
R/W R/W R/W R/W
DMAC
6 5 4 3 2
* * * * *
R/W R/W R/W R/W R/W
Transfer counter
* : Undefined
DMAC
DMAC
22 21 20 19 18
* * * * *
R/W R/W R/W R/W R/W
6 5 4 3 2
* * * * *
R/W R/W R/W R/W R/W
* : Undefined
DMAC
6 5 4 3 2
* * * * *
R/W R/W R/W R/W R/W
* : Undefined
Rev.6.00 Oct.28.2004 page 879 of 1016
1 0
* *
R/W R/W
17 16
* *
R/W R/W
1 0
* *
R/W R/W
1 0
* *
R/W R/W
REJ09B0138-0600H