Register Descriptions; Standby Control Register (Sbycr) - Renesas H8S Series Hardware Manual

21.2

Register Descriptions

21.2.1

Standby Control Register (SBYCR)

Bit : 7
SSBY
Initial value : 0
R/W : R/W
SBYCR is an 8-bit readable/writable register that performs software standby mode control.
SBYCR is initialized to H'08 by a reset and in hardware standby mode. It is not initialized in software standby mode.
Bit 7—Software Standby (SSBY): Specifies a transition to software standby mode. Remains set to 1 when software
standby mode is released by an external interrupt, and a transition is made to normal operation. The SSBY bit should be
cleared by writing 0 to it.
Bit 7
SSBY
0
1
Bits 6 to 4—Standby Timer Select 2 to 0 (STS2 to STS0): These bits select the time the MCU waits for the clock to
stabilize when software standby mode is cleared by an external interrupt. With crystal oscillation, refer to table 21-4 and
make a selection according to the operating frequency so that the standby time is at least 8 ms (the oscillation stabilization
time). With an external clock, any selection can be made*.
Note: * Not available in the F-ZTAT version.
Bit 6 Bit 5
STS2 STS1
0 0
1
1 0
1
Note: * Not available in the F-ZTAT version.
6 5
STS2 STS1
0 0
R/W R/W
Description
Transition to sleep mode after execution of SLEEP instruction
Transition to software standby mode after execution of SLEEP instruction
Bit 4
STS0 Description
0 Standby time = 8,192 states
1 Standby time = 16,384 states
0 Standby time = 32,768 states
1 Standby time = 65,536 states
0 Standby time = 131,072 states
1 Standby time = 262,144 states
0 Reserved
1 Standby time = 16 states*
4 3 2
STS0 OPE —
0 1 0
R/W R/W —
1 0
— —
0 0
— R/W
(Initial value)
(Initial value)
Rev.6.00 Oct.28.2004 page 669 of 1016
REJ09B0138-0600H