Renesas H8S Series Hardware Manual page 384

Bit 7
Channel IOB3
4 0
1
Bit 7
Channel IOB3
5 0
1
Rev.6.00 Oct.28.2004 page 356 of 1016
REJ09B0138-0600H
Bit 6 Bit 5 Bit 4
IOB2 IOB1 IOB0 Description
0 0 0 TGR4B is Output disabled
output
1
compare
0
1
register
1
1 0 0
1
1 0
1
0 0 0 TGR4B is
input
1
capture
×
1
register
× ×
1
Bit 6 Bit 5 Bit 4
IOB2 IOB1 IOB0 Description
0 0 0 TGR5B is Output disabled
output
1
compare
0
1
register
1
1 0 0
1
1 0
1
×
0 0 TGR5B is
input
1
capture
×
1
register
Initial output is 0 0 output at compare match
output
1 output at compare match
Toggle output at compare
match
Output disabled
Initial output is 1 0 output at compare match
output
1 output at compare match
Toggle output at compare
match
Capture input Input capture at rising edge
source is
Input capture at falling edge
TIOCB4 pin
Input capture at both edges
Capture input Input capture at generation of
source is TGR3C TGR3C compare match/
compare match/ input capture
input capture
Initial output is 0 0 output at compare match
output
1 output at compare match
Toggle output at compare
match
Output disabled
Initial output is 1 0 output at compare match
output
1 output at compare match
Toggle output at compare
match
Capture input Input capture at rising edge
source is
Input capture at falling edge
TIOCB5 pin
Input capture at both edges
(Initial value)
×: Don't care
(Initial value)
×: Don't care