Renesas H8S Series Hardware Manual page 937

PGDR—Port G Data Register
Bit
Initial value
Read/Write
PAPCR—Port A MOS Pull-Up Control Register
Bit
Initial value
Read/Write
Note: Setting is prohibited in the H8S/2352, H8S/2394, H8S/2392, and H8S/2390.
PBPCR—Port B MOS Pull-Up Control Register
Bit
Initial value
Read/Write
Note: Setting is prohibited in the H8S/2352, H8S/2394, H8S/2392, and H8S/2390.
PCPCR—Port C MOS Pull-Up Control Register
Bit
Initial value
Read/Write
Note: Setting is prohibited in the H8S/2352, H8S/2394, H8S/2392, and H8S/2390.
:
7 6
— —
:
Undefined Undefined Undefined
:
— —
:
7 6
PA7PCR PA6PCR PA5PCR
:
0 0
:
R/W R/W
Controls the MOS input pull-up function incorporated into port A on a bit-by-bit basis
:
7 6
PB7PCR PB6PCR PB5PCR
:
0 0
:
R/W R/W
Controls the MOS input pull-up function incorporated into port B on a bit-by-bit basis
:
7 6
PC7PCR PC6PCR PC5PCR
:
0 0
:
R/W R/W
Controls the MOS input pull-up function incorporated into port C on a bit-by-bit basis
H'FF6F
5 4 3
— PG4DR PG3DR
0 0
— R/W R/W
Stores output data for port G pins (PG
H'FF70
[On-chip ROM version Only]
5 4 3
PA4PCR PA3PCR
0 0 0
R/W R/W R/W
H'FF71
[On-chip ROM version Only]
5 4 3
PB4PCR PB3PCR
0
0 0
R/W R/W R/W
H'FF72
[On-chip ROM version Only]
5 4 3
PC4PCR PC3PCR
0 0 0
R/W R/W R/W
Port G
2 1
PG2DR PG1DR PG0DR
0 0
R/W R/W
4
Port A
2 1 0
PA2PCR PA1PCR PA0PCR
0 0 0
R/W R/W R/W
Port B
2 1 0
PB2PCR PB1PCR PB0PCR
0 0 0
R/W R/W R/W
Port C
2 1
PC0PCR
PC2PCR PC1PCR
0 0
R/W R/W R/W
Rev.6.00 Oct.28.2004 page 909 of 1016
0
0
R/W
to PG )
0
0
0
REJ09B0138-0600H