Pin Configuration; Register Configuration - Renesas H8S Series Hardware Manual

19.6.4

Pin Configuration

The flash memory is controlled by means of the pins shown in table 19-10.
Table 19-10 Flash Memory Pins
Pin Name
Reset
Flash write enable
Mode 2
Mode 1
Mode 0
Port 66
Port 65
Port 64
Transmit data
Receive data
19.6.5

Register Configuration

The registers used to control the on-chip flash memory when enabled are shown in table 19-11.
In order for these registers to be accessed, the FLSHE bit must be set to 1 in SYSCR2 (except RAMER).
Table 19-11 Flash Memory Registers
Register Name
Flash memory control register 1
Flash memory control register 2
Erase block register 1
Erase block register 2
System control register 2
RAM emulation register
Notes: 1. Lower 16 bits of the address.
2. Flash memory registers are selected by the FLSHE bit in system control register 2 (SYSCR2).
3. In modes in which the on-chip flash memory is disabled, a read will return H'00, and writes are invalid. Writes
are also disabled when the FWE bit is cleared to 0 in FLMCR1.
4. When a high level is input to the FWE pin, the initial value is H'80.
5. When a low level is input to the FWE pin, or if a high level is input and the SWE bit in FLMCR1 is not set, these
registers are initialized to H'00.
6. FLMCR1, FLMCR2, EBR1, and EBR2 are 8-bit registers. Only byte accesses are valid for these registers, the
access requiring 2 states.
7. SYSCR2 is available only in the F-ZTAT version. In the masked ROM and ZTAT versions, this register cannot
be written to and will return an undefined value if read.
Abbreviation I/O
RES
Input
FWE Input
MD Input
2
MD Input
1
MD Input
0
P66 Input
P65 Input
P64 Input
TxD1 Output
RxD1 Input
Abbreviation R/W
FLMCR1*
FLMCR2*
6
EBR1*
6
EBR2*
SYSCR2*
RAMER
Function
Reset
Flash program/erase protection by hardware
Sets MCU operating mode
Sets MCU operating mode
Sets MCU operating mode
Sets MCU operating mode in programmer
mode
Sets MCU operating mode in programmer
mode
Sets MCU operating mode in programmer
mode
Serial transmit data output
Serial receive data input
Initial Value
6 3 4
R/W* H'00*
6 3 5
R/W* H'00*
3 5
R/W* H'00*
3 5
R/W* H'00*
7
R/W H'00
R/W H'00
Rev.6.00 Oct.28.2004 page 581 of 1016
1
Address*
2
H'FFC8*
2
H'FFC9*
2
H'FFCA*
2
H'FFCB*
H'FF42
H'FEDB
REJ09B0138-0600H