Interrupt Exception Handling Sequence - Renesas H8S/2437 Hardware Manual

5.6.3

Interrupt Exception Handling Sequence

Figure 5.5 shows the interrupt exception handling sequence. The example shown is for the case
where interrupt control mode 0 is set in advanced mode, and the program area and stack area are
in on-chip memory.
Rev. 1.00, 09/03, page 85 of 704