Block Diagram; Pin Configuration - Renesas H8S Series Hardware Manual

15.1.2

Block Diagram

Figure 15-1 shows a block diagram of the Smart Card interface.
RxD
TxD
SCK
Legend:
SCMR: Smart Card mode register
RSR:
Receive shift register
RDR:
Receive data register
TSR:
Transmit shift register
TDR:
Transmit data register
SMR: Serial mode register
SCR:
Serial control register
SSR:
Serial status register
BRR: Bit rate register
15.1.3

Pin Configuration

Table 15-1 shows the Smart Card interface pin configuration.
Table 15-1 Smart Card Interface Pins
Channel
0
1
2
Rev.6.00 Oct.28.2004 page 518 of 1016
REJ09B0138-0600H
Module data bus
RDR TDR
RSR TSR
Parity generation
Parity check
Figure 15-1 Block Diagram of Smart Card Interface
Pin Name
Serial clock pin 0
Receive data pin 0
Transmit data pin 0
Serial clock pin 1
Receive data pin 1
Transmit data pin 1
Serial clock pin 2
Receive data pin 2
Transmit data pin 2
SCMR
SSR
SCR
Baud rate
SMR
generator
Transmission/
reception control
Clock
Symbol I/O Function
SCK0 I/O SCI0 clock input/output
RxD0 Input SCI0 receive data input
TxD0 Output SCI0 transmit data output
SCK1 I/O SCI1 clock input/output
RxD1 Input SCI1 receive data input
TxD1 Output SCI1 transmit data output
SCK2 I/O SCI2 clock input/output
RxD2 Input SCI2 receive data input
TxD2 Output SCI2 transmit data output
BRR
ø
ø/4
ø/16
ø/64
TXI
RXI
ERI
Internal
data bus