Block Diagram; Pin Configuration - Renesas H8S Series Hardware Manual

5.1.2

Block Diagram

A block diagram of the interrupt controller is shown in Figure 5-1.
SYSCR
NMI input
IRQ input
Internal interrupt
request
SWDTEND to TEI
Legend:
ISCR:
IER:
ISR:
IPR:
SYSCR:
5.1.3

Pin Configuration

Table 5-1 summarizes the pins of the interrupt controller.
Table 5-1 Interrupt Controller Pins
Name
Nonmaskable interrupt
External interrupt
requests 7 to 0
Rev.6.00 Oct.28.2004 page 82 of 1016
REJ09B0138-0600H
INTM1, INTM0
NMIEG
NMI input unit
IRQ input unit
ISR
ISCR IER
Interrupt controller
IRQ sense control register
IRQ enable register
IRQ status register
Interrupt priority register
System control register
Figure 5-1 Block Diagram of Interrupt Controller
Symbol
NMI
IRQ7 to IRQ0 Input
Priority
determination
IPR
I/O Function
Input Nonmaskable external interrupt; rising or
falling edge can be selected
Maskable external interrupts; rising, falling, or
both edges, or level sensing, can be selected
CPU
Interrupt
request
Vector
number
I
CCR
I2 to I0
EXR