Renesas H8S Series Hardware Manual page 530

• Multiprocessor serial data reception
Figure 14-12 shows a sample flowchart for multiprocessor serial reception.
The following procedure should be used for multiprocessor serial data reception.
No
No
No
Rev.6.00 Oct.28.2004 page 502 of 1016
REJ09B0138-0600H
Initialization
Start reception
Read MPIE bit in SCR
Read ORER and FER flags in SSR
FER∨ORER= 1
No
Read RDRF flag in SSR
RDRF= 1
Yes
Read receive data in RDR
This station's ID?
Yes
Read ORER and FER flags in SSR
FER∨ORER= 1
No
Read RDRF flag in SSR
RDRF= 1
Yes
Read receive data in RDR
All data received?
Yes
Clear RE bit in SCR to 0
<End>
Figure 14-12 Sample Multiprocessor Serial Reception Flowchart
[1]
SCI initialization:
[1]
The RxD pin is automatically
designated as the receive data
input pin.
[2]
ID reception cycle:
[2]
Set the MPIE bit in SCR to 1.
[3]
SCI status check, ID reception
and comparison:
Yes
Read SSR and check that the
RDRF flag is set to 1, then read
the receive data in RDR and
compare it with this station's ID.
[3]
If the data is not this station's ID,
set the MPIE bit to 1 again, and
clear the RDRF flag to 0.
If the data is this station's ID,
clear the RDRF flag to 0.
[4] SCI status check and data
reception:
Read SSR and check that the
RDRF flag is set to 1, then read
the data in RDR.
[5]
Receive error processing and
break detection:
If a receive error occurs, read the
ORER and FER flags in SSR to
Yes identify the error. After
performing the appropriate error
processing, ensure that the
ORER and FER flags are all
cleared to 0.
[4]
Reception cannot be resumed if
either of these flags is set to 1.
No
In the case of a framing error, a
break can be detected by reading
the RxD pin value.
[5]
Error processing
(Continued on
next page)