Register Configuration - Renesas H8S Series Hardware Manual

6.1.4

Register Configuration

Table 6-2 summarizes the registers of the bus controller.
Table 6-2 Bus Controller Registers
Name
Bus width control register
Access state control register
Wait control register H
Wait control register L
Bus control register H
Bus control register L
Memory control register
DRAM control register
Refresh timer/counter
Refresh time constant register
Notes: 1. Lower 16 bits of the address.
2. Determined by the MCU operating mode.
3. Manual reset is only supported in the H8S/2357 ZTAT.
Abbreviation R/W
ABWCR R/W
ASTCR R/W
WCRH R/W
WCRL R/W
BCRH R/W
BCRL R/W
MCR R/W
DRAMCR R/W
RTCNT R/W
RTCOR R/W
Initial Value
Power-On Manual
3
Reset Reset*
2
H'FF/H'00* Retained
H'FF Retained
H'FF Retained
H'FF Retained
H'D0 Retained
H'3C Retained
H'00 Retained
H'00 Retained
H'00 Retained
H'FF Retained
Rev.6.00 Oct.28.2004 page 107 of 1016
1
Address*
H'FED0
H'FED1
H'FED2
H'FED3
H'FED4
H'FED5
H'FED6
H'FED7
H'FED8
H'FED9
REJ09B0138-0600H