Switching Of Internal Clocks And Tcnt Operation - Renesas H8S Series Hardware Manual

12.6.5

Switching of Internal Clocks and TCNT Operation

TCNT may increment erroneously when the internal clock is switched over. Table 12-5 shows the relationship between
the timing at which the internal clock is switched (by writing to the CKS1 and CKS0 bits) and the TCNT operation.
When the TCNT clock is generated from an internal clock, the falling edge of the internal clock pulse is detected. If clock
switching causes a change from high to low level, as shown in case 3 in table 12-5, a TCNT clock pulse is generated on
the assumption that the switchover is a falling edge. This increments TCNT.
The erroneous incrementation can also happen when switching between internal and external clocks.
Table 12-5 Switching of Internal Clock and TCNT Operation
Timing of Switchover
by Means of CKS1
No. and CKS0 Bits
1 Switching from
low to low*
2 Switching from
low to high*
3 Switching from
high to low*
TCNT Clock Operation
Clock before
1
switchover
Clock after
switchover
TCNT clock
TCNT
Clock before
2
switchover
Clock after
switchover
TCNT clock
TCNT
Clock before
3
switchover
Clock after
switchover
TCNT clock
TCNT
N N+1
CKS bit write
N N+1
CKS bit write
4
*
N N+1
CKS bit write
Rev.6.00 Oct.28.2004 page 451 of 1016
N+2
N+2
REJ09B0138-0600H