Renesas H8S Series Hardware Manual page 847

Instruction
STM
STMAC
SUB
SUBS
SUBX
TAS
TRAPA
XOR
XORC
Notes: 1. 2 when EXR is invalid, 3 when EXR is valid.
2. When n bytes of data are transferred.
3. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
Mnemonic
STM.L (ERn-ERn+1),
@-SP
STM.L (ERn-ERn+2),
@-SP
STM.L (ERn-ERn+3),
@-SP
STMAC MACH,ERd
STMAC MACL,ERd
SUB.B Rs,Rd
SUB.W #xx:16,Rd
SUB.W Rs,Rd
SUB.L #xx:32,ERd
SUB.L ERs,ERd
SUBS #1/2/4,ERd
SUBX #xx:8,Rd
SUBX Rs,Rd
3
TAS @ERd*
TRAPA #x:2 Advanced
XOR.B #xx:8,Rd
XOR.B Rs,Rd
XOR.W #xx:16,Rd
XOR.W Rs,Rd
XOR.L #xx:32,ERd
XOR.L ERs,ERd
XORC #xx:8,CCR
XORC #xx:8,EXR
Branch
Instruction Address Stack
Fetch Read Operation
I J K
2 4
2 6
2 8
Cannot be used in the H8S/2357 Group
1
2
1
3
1
1
1
1
2
2 2 2/3*
1
1
2
1
3
2
1
2
Byte Word
Data Data
Access Access
L M
2
1
Rev.6.00 Oct.28.2004 page 819 of 1016
Internal
Operation
N
1
1
1
2
REJ09B0138-0600H