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12.2.3 Pulse Period and Pulse Width Measurement Mode
In pulse period and pulse width measurement mode, the timer measures pulse period or pulse width of an
external signal (see Table 12.2.3.1). Figure 12.2.3.1 shows TBiMR register in pulse period and pulse
width measurement mode. Figure 12.2.3.2 shows the operation timing when measuring a pulse period.
Figure 12.2.3.3 shows the operation timing when measuring a pulse width.
Table 12.2.3.1 Specifications in Pulse Period and Pulse Width Measurement Mode
Item
Count source
Count operation
Count start condition
Count stop condition
Interrupt request generation timing • When an effective edge of measurement pulse is input
TBi
pin function
IN
Read from timer
Write to timer
NOTES:
1. Interrupt request is not generated when the first effective edge is input after the timer started counting.
2. Value read from TBi register is indeterminate until the second valid edge is input after the timer starts counting.
3. The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
Timer Bi mode register (i=0 to 2)
b7
b6
b5
b4
b3
NOTE:
1. This flag is indeterminate after reset. When the TBiS bit is set to "1" (start counting), the MR3 bit is cleared to "0" (no overflow) by writing to the
TBiMR register at the next count timing or later after the MR3 bit was set to "1" (overflowed). The MR3 bit cannot be set to "1" in a program. The
TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
Figure 12.2.3.1 TBiMR Register in Pulse Period and Pulse Width Measurement Mode
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. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
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, B
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f
, f
, f
, f
, f
1
2
8
32
C32
• Up-count
• Counter value is transferred to reload register at an effective edge of mea-
surement pulse. The counter value is set to "0000
Set TBiS (i=0 to 2) bit
Set TBiS bit to "0" (= stop counting)
• Timer overflow. When an overflow occurs, MR3 bit in the TBiMR register is
set to "1" (overflowed) simultaneously. MR3 bit is cleared to "0" (no over-
flow) by writing to TBiMR register at the next count timing or later after MR3
bit was set to "1". At this time, make sure TBiS bit is set to "1" (start count-
ing).
Measurement pulse input
Contents of the reload register (measurement result) can be read by reading TBi register
Value written to TBi register is written to neither reload register nor counter
b2
b1
b0
Symbol
1
0
TB0MR to TB2MR
Bit symbol
Bit name
TMOD0
Operation mode
select bit
TMOD1
Measurement mode
MR0
select bit
MR1
MR2
TB0MR register
Must be set to "0" in pulse period and pulse width measurement mode
TB1MR, TB2MR registers
Nothing is assigned. When write, set to "0". When read, its content turns out to be
indeterminate.
Timer Bi overflow
MR3
(1)
flag
TCK0
Count source
select bit
TCK1
page 113
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Specification
(3)
to "1" (= start counting)
Address
After reset
039B
to 039D
00XX0000
16
16
2
Function
b1 b0
1 0 : Pulse period / pulse width
measurement mode
b3 b2
0 0 : Pulse period measurement
(Measurement between a falling edge and the
next falling edge of measured pulse)
0 1 : Pulse period measurement
(Measurement between a rising edge and the next
rising edge of measured pulse)
1 0 : Pulse width measurement
(Measurement between a falling edge and the
next rising edge of measured pulse and between
a rising edge and the next falling edge)
1 1 : Must not be set.
0 : Timer did not overflow
1 : Timer has overflowed
b7 b6
0 0 : f
or f
1
2
0 1 : f
8
1 0 : f
32
1 1 : f
C32
12. Timer
" to continue counting.
16
(1)
RW
RW
RW
RW
RW
RW
RO
RW
RW
(2)
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