Port A Block Diagram - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
Hide thumbs Also See for H8S Series:
Table of Contents

Advertisement

C.7

Port A Block Diagram

*
1
PA
n
*
2
Legend:
WDDRA:
Write to PADDR
WDRA:
Write to PADR
WODRA:
Write to PAODR
WPCRA:
Write to PAPCR
RDRA:
Read PADR
RPORA:
Read port A
RODRA:
Read PAODR
RPCRA:
Read PAPCR
n = 0 to 3
Figure C-7 (a) Port A Block Diagram (Pins PA
Q
PAnPCR
WPCRA
Mode
4/5
Q
PAnDDR
WDDRA
Q
Mode 7
Mode 4/5/6
Q
PAnODR
WODRA
Notes: 1. Output enable signal
2. Open drain control signal
Reset
R
D
C
RPCRA
Reset
R
D
C
Reset
R
D
PAnDR
C
WDRA
Reset
R
D
C
RODRA
RDRA
RPORA
to PA
)
0
3
Rev.6.00 Oct.28.2004 page 989 of 1016
REJ09B0138-0600H

Advertisement

Table of Contents
loading

Table of Contents