VeEX MPA User Manual page 129

Multi-protocol analyzer
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MPA_e_manual_D07-00-129P_RevA00
Protocol Tabs
400G RS-FEC Ethernet Alarms:
Bit Delay- Adds a known value of time delay to the selected specified virtual
lane. This delay is entered as bits and displayed as bits and pico seconds.
Logical/PCS/FEC Lane -This is the virtual lane number that will be identified by
the alignment marker logic for assignment to a particular physical lane. Selecting
the virtual lane will bring up a menu that allows swapping lane assignment to any
other virtual lane. Depending on the selected Interface type, if the number of
virtual lanes double the number of physical lanes then two Logical or FEC/PCS
virtual lanes will be mapped into each physical lane. The number in
(parentheses) is the virtual lane's fixed position.
Physical Lane - This is the fixed tag/label for the transmitting physical lane. In
the Lane Summary LED area, the number in (parentheses) is the physical lane's
fixed position.
Receive
MLD Receive Screens and Functions
The Receive section allows you to configure the receive settings for the parameters
used in Multi-Lane Distribution (MLD) operations.
The following receive functionalities are available through the MLD receive screens.
SET
Multi Lanes
SIG (Signal Status)
MLD Receive - Set
The MLD Receive Settings screen configures the MLD transmit parameters. It contains
the following functions:
129
FEC Alignment Marker Loss: Causes the specified FEC lane to lose
its FEC Alignment Marker Lock. This is reported as an LOAMPS
alarm in the Results screen.

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