ST STM32L4+ Series Reference Manual page 1396

General-purpose timers (TIM15/TIM16/TIM17)
OC2'
OC1'
OC2
OC1
OC1REF
OC2REF
OC1REF'
OC2REF'
OC1REFC
OC1REFC'
39.4.12 Complementary outputs and dead-time insertion
The TIM15/TIM16/TIM17 general-purpose timers can output one complementary signal and
manage the switching-off and switching-on of the outputs.
This time is generally known as dead-time and it has to be adjusted depending on the
devices that are connected to the outputs and their characteristics (intrinsic delays of level-
shifters, delays due to power switches...)
The polarity of the outputs (main output OCx or complementary OCxN) can be selected
independently for each output. This is done by writing to the CCxP and CCxNP bits in the
TIMx_CCER register.
The complementary signals OCx and OCxN are activated by a combination of several
control bits: the CCxE and CCxNE bits in the TIMx_CCER register and the MOE, OISx,
OISxN, OSSI and OSSR bits in the TIMx_BDTR and TIMx_CR2 registers. Refer to
Table 287: Output control bits for complementary OCx and OCxN channels with break
feature (TIM16/17) on page 1451
when switching to the idle state (MOE falling down to 0).
Dead-time insertion is enabled by setting both CCxE and CCxNE bits, and the MOE bit if the
break circuit is present. There is one 10-bit dead-time generator for each channel. From a
1396/2301
Figure 414. Combined PWM mode on channel 1 and 2
OC1REFC = OC1REF AND OC2REF
OC1REFC' = OC1REF' OR OC2REF'
for more details. In particular, the dead-time is activated
RM0432 Rev 6
RM0432
MS31094V1