Renesas RL78 Series User Manual page 898

RL78/G1D
30.13 Timing of Entry to Flash Memory Programming Modes
(T = –40 to +85°C, 1.8 V ≤ V
A
Parameter
Time to complete the communication for the initial
setting after the external reset is released
Time to release the external reset after the TOOL0
pin is set to the low level
Time to hold the TOOL0 pin at the low level after
the external reset is released
(excluding the processing time of the firmware to
control the flash memory)
Remark t : Communication for the initial setting must be completed within 100 ms after the external reset is
SUINIT
released during this period.
t : Time to release the external reset after the TOOL0 pin is set to the low level
SU
t : Time to hold the TOOL0 pin at the low level after the external reset is released (excluding the processing
HD
time of the firmware to control the flash memory)
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
= V = AV
DD DD_RF DD_RF
Symbol
t
SUINIT
t
SU
t
HD
<1>
RESET
TOOL0
t
SU
<1> The low level is input to the TOOL0 pin.
<2> The external reset is released (POR and LVD reset must be released before the external
reset is released.).
<3> The TOOL0 pin is set to the high level.
<4> Setting of the flash memory programming mode by UART reception and complete the baud
rate setting.
CHAPTER 30 ELECTRICAL SPECIFICATIONS
≤ 3.6 V, V = V = AV
SS SS_RF
Conditions
POR and LVD reset must be released
before the external reset is released.
POR and LVD reset must be released
before the external reset is released.
POR and LVD reset must be released
before the external reset is released.
<2>
<3>
723 ms + t
HD
processing
time
1-byte data for setting mode
t
SUINIT
= 0 V)
SS_RF
MIN.
10
1
<4>
MAX. Unit
100 ms
µs
ms
877