Renesas RL78 Series User Manual page 393

RL78/G1D
Figure 13-1 shows the block diagram of serial array unit 0.
Peripheral enable
register 0 (PER0)
PRS
SAU0EN
013
f
CLK
Channel 0
Serial clock I/O pin
Synchro-
(when CSI00: SCK00)
nous
circuit
(when IIC00: SCL00)
PM10
Serial data input pin
Noise
Synchro-
(when CSI00: SI00)
elimination
nous
enabled/
circuit
(when IIC00: SDA00)
disabled
(when UART0: RxD0)
SNFEN00
TXE RXE
00 00
When UART0
Channel 2
Synchro-
Serial data input pin
elimination
nous
enabled/
circuit
(when UART1: R D1)
X disabled
SNFEN10
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Figure 13-1. Block Diagram of Serial Array Unit 0
0 0 0
0 0
Serial clock select register 0 (SPS0)
PRS PRS PRS PRS
PRS PRS
002
012 011 010 003
4
4
Prescaler
f /2 0 to f /2 15 f /2
CLK
CLK CLK
Selector Selector
CK01 CK00
(Clock division setting block)
f
MCK
f
Edge
SCK
detection
Output latch
(P10)
Edge/level
detection
CKS00 CCS00 STS00 MD002
Serial mode register 00 (SMR00)
DAP CKP PTC PTC
EOC DIR
00 00 00 001 000 00
Serial communication operation setting register 00 (SCR00)
CK00
CK01
Noise
Edge/level
detection
Serial output register 0 (SO0)
0 0
CKO02 0
0 CKO00
PRS
001 000
0 15
to f /2
CLK
Serial data register 00 (SDR00)
(Buffer register block)
f
TCLK
Shift register
Communication controller
Mode selection
CSI00 or IIC00
or UART0
(for transmission)
MD001
SLC
SLC DLS DLS
001 000 001 000
Communication controller
Mode selection
UART1
(for transmission)
CHAPTER 13 SERIAL ARRAY UNIT
0 0 SO02
0 SO00
Serial channel
enable status
SE03 SE02 SE01 SE00
register 0 (SE0)
Serial channel
SS03 SS02 SS01
SS00
start register 0
(SS0)
Serial channel
ST03 ST02 ST01 ST00
stop register 0
(ST0)
Serial output
0 SOE02 0 SOE00
enable register 0
(SOE0)
Serial output level
0
SOL02 0 SOL00
register 0 (SOL0)
Output latch
PM11 or P12
(P11 or P12)
Output
controller
Interrupt
controller
Serial flag clear trigger
register 00 (SIR00)
OVCT
PECT
00 00
Clear
Error controller
Error
information
TSF
BFF PEF OVF
00 00 00
00
Serial status register 00 (SSR00)
Noise filter enable
register 0 (NFEN0)
SNFEN SNFEN
10 00
Serial standby
control register 0
(SSC0)
SSEC0 SWC0
Serial data output pin
(when CSI00: SO00)
(when IIC00: SDA00)
(when UART0: T D0)
X
Serial transfer end interrupt
(when CSI00: INTCSI00)
(when IIC00: INTIIC00)
(when UART0: INTST0)
Serial data output pin
(when UART1: T D1)
X
Serial transfer end interrupt
(when UART1: INTST1)
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