Renesas RL78 Series User Manual page 115

16-bit single-chip microcontrollers
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RL78/G1D
Symbol
7
6
Note 4
P0
0
P06
Note 3
P1
P17
P16
P2
0
0
P3
0
0
P4
0
0
P5
0
0
P6
0
0
Note 4
Note 4
P7
P77
P76
P12
0
0
P13
P137
0
Note
P14
P147
P146
3
Pmn
0
Output 0
1
Output 1
Notes 1.
P121 to P124, and P137 are read-only.
2.
P137 : Undefined
P130:
0 (output latch)
3.
These internal pins must be set to output mode after reset release by software by setting 0 to the port
register and port mode register.
4.
Bit for internal connected pin. For details, see CHAPTER 2.
Caution Be sure to set bits that are not mounted to their initial values.
Remark m = 0 to 7, 12 to 14; n = 0 to 7
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Figure 5-2. Format of Port Register
5
4
3
Note 4
Note 3
P05
P04
P03
P15
P14
P13
0
0
P23
0
0
0
Note 3
0
0
P43
Note 3
Note 3
Note 3
P55
P54
P53
Note 3
0
0
P63
Note 4
Note 4
Note 3
P75
P74
P73
0
P124
P123
0
0
0
0
0
0
Output data control (in output mode)
2
1
0
P02
P01
P00
P12
P11
P10
P22
P21
P20
Note 3
0
P31
P30
Note 3
Note 3
P42
P41
P40
Note 3
Note 3
Note 3
P52
P51
P50
Note 3
P62
0
0
Note 4
Note 4
Note 4
P72
P71
P70
P122
P121
P120
0
0
P130
Note
0
P141
P140
3
Input data read (in input mode)
Input low level
Input high level
CHAPTER 5 PORT FUNCTIONS
Address
After reset
FFF00H
00H (output latch) R/W
FFF01H
00H (output latch) R/W
FFF02H
00H (output latch) R/W
FFF03H
00H (output latch) R/W
FFF04H
00H (output latch) R/W
FFF05H
00H (output latch) R/W
FFF06H
00H (output latch) R/W
FFF07H
00H (output latch) R/W
FFF0CH
Undefined
FFF0DH
Note 2
FFF0EH
00H (output latch) R/W
R/W
Note 1
R/W
Note 1
R/W
94

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