Renesas RL78 Series User Manual page 851

RL78/G1D
(T = –40 to +85°C, 1.6 V ≤ V
A
Items
Interrupt input high-level width,
low-level width
External PA control output High-
level width
External PA control output low-
level width
RESET low-level width
RESET_RF internal pin low-
level width
Minimum Instruction Execution Time during Main System Clock Operation
10
1.0
0.1
0.0625
0.05
0.03125
0.01
0
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
= V = AV ≤ 3.6 V, V
DD DD_RF DD_RF
Symbol
t INTP0, INTP3, INTP5, INTP6
INTH,
t
INTL
t TXSELH_RF
PAHRF
t TXSELL_RF
PALRF
t RESET
RSL
t RESET_RF internal pin
RSTLRF
T vs V (HS (high-speed main) mode)
CY DD
3.0
1.0 2.0 4.0
2.4 2.7 3.6
Supply voltage V [V]
DD
CHAPTER 30 ELECTRICAL SPECIFICATIONS
= V = AV
SS SS_RF SS_RF
Conditions
When the high-speed on-chip oscillator clock is selected
During self programming
When high-speed system clock is selected
= 0 V) (2/2)
MIN. TYP. MAX.
1
283
283
10
31
Unit
µs
µs
µs
µs
µs
830