Renesas RL78 Series User Manual page 196

16-bit single-chip microcontrollers

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Address: F0190H, F0191H (TMR00) to F019EH, F019FH (TMR07)

(Bit 11 of TMRmn (n = 2, 4, 6))

Only the channel 2, 4, 6 can be set as a master channel (MASTERmn = 1).

Be sure to use channel 0, 5, 7 are fixed to 0 (Regardless of the bit setting, channel 0 operates as master, because it

is the highest channel).

Clear the MASTERmn bit to 0 for a channel that is used with the independent channel operation function.

(Bit 11 of TMRmn (n = 1, 3))

Other than above

Note Bit 11 is a read-only bit and fixed to 0. Writing to this bit is ignored.

m: Unit number (m = 0), n: Channel number (n = 0 to 7)

R01UH0515EJ0120 Rev.1.20

Dec 16, 2016

Figure 7-11. Format of Timer Mode Register mn (TMRmn) (2/4)

Selection between using channel n independently or

simultaneously with another channel(as a slave or master)

Operates in independent channel operation function or as slave channel in simultaneous

channel operation function.

Operates as master channel in simultaneous channel operation function.

Selection of 8 or 16-bit timer operation for channels 1 and 3

Operates as 16-bit timer.

(Operates in independent channel operation function or as slave channel in simultaneous

channel operation function.)

Operates as 8-bit timer.

After reset: 0000H

Setting of start trigger or capture trigger of channel n

Only software trigger start is valid (other trigger sources are

unselected).

Valid edge of the TImn pin input is used as both the start trigger and

capture trigger.

Both the edges of the TImn pin input are used as a start trigger and a

capture trigger.

Interrupt signal of the master channel is used (when the channel is

used as a slave channel with the simultaneous channel operation

Setting prohibited

CHAPTER 7 TIMER ARRAY UNIT

Rl78/g1d R5f11agg R5f11agh R5f11agj