RL78/G1D
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Table 4-3. Vector Table
Vector Table Address
0000H
RESET, POR, LVD, WDT, TRAP, IAW, RPE
0004H
INTWDTI
0006H
INTLVI
0008H
INTP0
000EH
INTP3
0012H
INTP5
0014H
INTCSI20/INTIIC20
0016H
INTCSI21
0018H
INTTM11H
001AH
INTDMA0
001CH
INTDMA1
001EH
INTST0/INTCSI00/INTIIC00
0020H
INTSR0
0022H
INTSRE0
INTTM01H
0024H
INTST1
0026H
INTSR1
0028H
INTSRE1
INTTM03H
002AH
INTIICA0
002CH
INTTM00
002EH
INTTM01
0030H
INTTM02
0032H
INTTM03
0034H
INTAD
0036H
INTRTC
0038H
INTIT
0042H
INTTM04
0044H
INTTM05
0046H
INTTM06
0048H
INTTM07
004AH
INTP6
0054H
INTRF
005EH
INTMD
0062H
INTFL
0064H
INTDMA2
0066H
INTDMA3
007EH
BRK
CHAPTER 4 CPU ARCHITECTURE
Interrupt Source
43