Renesas RL78 Series User Manual page 875

RL78/G1D
CSI mode serial transfer timing (slave mode) (during communication at different potential)
SCKp
SIp
SOp
CSI mode serial transfer timing (slave mode) (during communication at different potential)
SCKp
SIp
SOp
Caution Select the TTL input buffer for the SIp pin and the N-ch open drain output (V
SOp pin and SCKp pin by using port input mode register g (PIMg) and port output mode register g
(POMg).
Remark p: CSI number (p = 00), m: Unit number (m = 0), n: Channel number (n = 0), g: PIM and POM number (g = 1)
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
(When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1.)
t
KL2
t
KSO2
(When DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.)
t
KH2
t
KSO2
CHAPTER 30 ELECTRICAL SPECIFICATIONS
t
KCY2
t
KH2
t
t
SIK2
KSI2
Input data
Output data
t
KCY2
t
KL2
t
t
SIK2
KSI2
Input data
Output data
tolerance) mode for the
DD
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