Renesas RL78 Series User Manual page 604

16-bit single-chip microcontrollers

Hide thumbs Also See for RL78 Series:

Table of Contents

(ii) When WTIMn = 1

AD6 to AD0 R/W ACK

1: IICSn = 0110×010B

2: IICSn = 0010×110B

3: IICSn = 0010×100B

4: IICSn = 0010××00B

5: IICSn = 00000001B

: Always generated

: Generated only when SPIEn = 1

(6) Operation when arbitration loss occurs (no communication after arbitration loss)

When the device is used as a master in a multi-master system, read the MSTSn bit each time interrupt request

signal INTIICAn has occurred to check the arbitration result.

(a) When arbitration loss occurs during transmission of slave address data (when WTIMn = 1)

AD6 to AD0 R/W ACK

1: IICSn = 01000110B

2: IICSn = 00000001B

: Always generated

: Generated only when SPIEn = 1

Remark n = 0

R01UH0515EJ0120 Rev.1.20

Dec 16, 2016

CHAPTER 14 SERIAL INTERFACE IICA

Rl78/g1d R5f11agg R5f11agh R5f11agj