Renesas RL78 Series User Manual page 718

16-bit single-chip microcontrollers
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RL78/G1D
Figure 19-3. STOP Mode Release by Interrupt Request Generation (2/2)
(b) When high-speed system clock (X1 oscillation) is used as CPU clock
Standby release signal
Status of CPU
High-speed
system clock
(X1 oscillation)
Notes 1. For details of the standby release signal, see Figure 18-1.
2. STOP mode release time
Supply of the clock is stopped: 18 µs to "whichever is longer 65 µs and the oscillation stabilization time
Wait
● When vectored interrupt servicing is carried out: 10 to 11 clocks
● When vectored interrupt servicing is not carried out: 4 to 5 clocks
(c) When high-speed system clock (external clock input) is used as CPU clock
Standby release signal
Status of CPU
High-speed
system clock
(external clock input)
Notes 1. For details of the standby release signal, see Figure 18-1.
2. STOP mode release time
Supply of the clock is stopped:
Wait
● When vectored interrupt servicing is carried out:
● When vectored interrupt servicing is not carried out: 1 clock
Caution To reduce the oscillation stabilization time after release from the STOP mode while CPU operates
based on the high-speed system clock (X1 oscillation), switch the clock to the high-speed on-chip
oscillator clock temporarily before executing the STOP instruction.
Remarks 1. The clock supply stop time varies depending on the temperature conditions and STOP mode period.
2. The broken lines indicate the case when the interrupt request that has released the standby mode is
acknowledged.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
STOP
instruction
Note 1
Normal operation
(high-speed
system clock)
STOP mode
Oscillates
Oscillation stopped
(set by OSTS)"
STOP
instruction
Note 1
Normal operation
(high-speed
system clock)
Oscillates
18 µs to 65 µs
CHAPTER 19 STANDBY FUNCTION
Interrupt
request
STOP mode release time
Supply of the
clock is stopped
Oscillates
Interrupt
request
STOP mode release time
Supply of the
STOP mode
clock is stopped
Oscillation stopped
7 clocks
Note 2
Normal operation
(high-speed
system clock)
Wait
Note 2
Normal operation
(high-speed
Wait
system clock)
Oscillates
697

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