Renesas RL78 Series User Manual page 878

RL78/G1D
2
Simplified I C mode connection diagram (during communication at different potential)
Simplified I
SCLr
SDAr
Remarks 1. R [Ω]:Communication line (SDAr, SCLr) pull-up resistance, C
b
capacitance, V
2. r: IIC number (r = 00, 10), g: PIM, POM number (g = 0, 1)
3. f : Serial array unit operation clock frequency
MCK
(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn). m: Unit number, n:
Channel number (mn = 00, 02))
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
SDAr
RL78
microcontroller
SCLr
2
C mode serial transfer timing (during communication at different potential)
t
LOW
[V]: Communication line voltage
b
CHAPTER 30 ELECTRICAL SPECIFICATIONS
V V
b b
R R
b
b
SDA
User device
SCL
1/f
SCL
t
HIGH
[F]: Communication line (SDAr, SCLr) load
b
t t
HD:DAT SU:DAT
857