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Manuals and User Guides for Renesas R5F11AGG. We have
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Renesas R5F11AGG manual available for free PDF download: User Manual
Renesas R5F11AGG User Manual (910 pages)
16-Bit Single-Chip Microcontrollers
Brand:
Renesas
| Category:
Microcontrollers
| Size: 6.52 MB
Table of Contents
Table of Contents
7
Chapter 1 Outline
22
Features
22
List of Part Numbers
25
Pin Configuration (Top View)
26
Pin Identification
27
Block Diagram
28
Outline of Functions
29
Chapter 2 Connection between Mcu and Rf Transceiver
32
Connection Pins of MCU and RF Transceiver
32
Communication Interface between MCU and RF Transceiver
34
Initial Settings of Unused Internal Pins of MCU
34
Operation Clock of Bluetooth Low Energy
35
Power Configuration
36
Chapter 3 Pin Functions
37
Pin Functions
37
Functions Other than Port Pins
40
Connection of Unused Pins
43
Block Diagrams of Pins
45
Chapter 4 Cpu Architecture
57
Memory Space
57
Internal Program Memory Space
63
Mirror Area
66
Internal Data Memory Space
68
Special Function Register (SFR) Area
68
Extended Special Function Register (2Nd SFR: 2Nd Special Function Register) Area
68
Data Memory Addressing
69
Processor Registers
72
Control Registers
72
General-Purpose Registers
74
And CS Registers
75
Special Function Registers (Sfrs)
76
Extended Special Function Registers (2Nd Sfrs: 2Nd Special Function Registers)
82
Instruction Address Addressing
88
Relative Addressing
88
Immediate Addressing
88
Register Direct Addressing
89
Addressing for Processing Data Addresses
90
Implied Addressing
90
Register Addressing
90
Direct Addressing
91
Short Direct Addressing
92
SFR Addressing
93
Register Indirect Addressing
94
Based Addressing
95
Based Indexed Addressing
99
Stack Addressing
100
Chapter 5 Port Functions
104
Port Functions
104
Port Configuration
105
Port 12
105
Port 0
106
Port 1
106
Port 13
106
Port 2
107
Port 3
107
Port 4
107
Port 6
107
Port 7
107
Port 14
108
GPIO Port
108
Registers Controlling Port Function
109
Port Mode Registers (Pmxx)
112
Port Registers (Pxx)
114
Pull-Up Resistor Option Registers (Puxx)
116
Port Input Mode Registers (Pimxx)
117
Port Output Mode Registers (Pomxx)
118
Port Mode Control Registers (Pmcxx)
119
A/D Port Configuration Register (ADPC)
120
Peripheral I/O Redirection Register (PIOR)
121
Global Digital Input Disable Register (GDIDIS)
121
Port Function Operations
122
Writing to I/O Port
122
Reading from I/O Port
122
Operations on I/O Port
122
Handling Different Potential (1.8 V, 2.5 V) by Using EVDD ≤ VDD
123
Handling Different Potential (1.8 V, 2.5 V) by Using I/O Buffers
123
Register Settings When Using Alternate Function
125
Basic Concept When Using Alternate Function
125
Register Settings for Alternate Function Whose Output Function Is Not Used
126
Register Setting Examples for Used Port and Alternate Functions
127
Cautions When Using Port Function
132
Cautions on 1-Bit Manipulation Instruction for Port Register N (Pn)
132
Notes on Specifying the Pin Settings
133
Chapter 6 Clock Generator
134
Functions of Clock Generator
134
Configuration of Clock Generator
136
Registers Controlling Clock Generator
138
Clock Operation Mode Control Register (CMC)
138
System Clock Control Register (CKC)
141
Clock Operation Status Control Register (CSC)
142
Oscillation Stabilization Time Counter Status Register (OSTC)
143
Oscillation Stabilization Time Select Register (OSTS)
145
Peripheral Enable Register 0 (PER0)
147
Subsystem Clock Supply Mode Control Register (OSMC)
149
High-Speed On-Chip Oscillator Frequency Select Register (HOCODIV)
150
High-Speed On-Chip Oscillator Trimming Register (HIOTRM)
151
System Clock Oscillator
152
X1 Oscillator
152
XT1 Oscillator
152
High-Speed On-Chip Oscillator
156
Low-Speed On-Chip Oscillator
156
RF Reference Clock Oscillator
156
Clock Generator Operation
157
Controlling Clock
159
Example of Setting High-Speed On-Chip Oscillator
159
Example of Setting X1 Oscillation Clock
160
Example of Setting XT1 Oscillation Clock
161
CPU Clock Status Transition Diagram
162
Condition before Changing CPU Clock and Processing after Changing CPU Clock
168
Time Required for Switchover of CPU Clock and System Clock
170
Conditions before Clock Oscillation Is Stopped
171
Resonator and Oscillator Constants
172
Chapter 7 Timer Array Unit
177
Functions of Timer Array Unit
178
Independent Channel Operation Function
178
Simultaneous Channel Operation Function
179
8-Bit Timer Operation Function (Channel 1 and 3 Only)
180
Configuration of Timer Array Unit
181
Timer Count Register Mn (Tcrmn)
186
Timer Data Register Mn (Tdrmn)
188
Registers Controlling Timer Array Unit
189
Peripheral Enable Register 0 (PER0)
190
Timer Clock Select Register M (Tpsm)
191
Timer Mode Register Mn (Tmrmn)
194
Timer Status Register Mn (Tsrmn)
200
Timer Channel Enable Status Register M (Tem)
201
Timer Channel Start Register M (Tsm)
202
Timer Channel Stop Register M (Ttm)
203
Timer Input Select Register 0 (TIS0)
204
Timer Output Enable Register 0 (TOE0)
205
Timer Output Register 0 (TO0)
206
Timer Output Level Register 0 (TOL0)
207
Timer Output Mode Register 0 (TOM0)
208
Noise Filter Enable Register 1 (NFEN1)
209
Registers Controlling Port Functions of Pins to be Used for Timer I/O
210
Basic Rules of Timer Array Unit
211
Basic Rules of Simultaneous Channel Operation Function
211
Basic Rules of 8-Bit Timer Operation Function (Channels 1 and 3 Only)
213
Operation of Counter
214
Count Clock (Ftclk)
214
Start Timing of Counter
216
Operation of Counter
217
Channel Output (To0N Pin) Control
222
To0N Pin Output Circuit Configuration
222
To0N Pin Output Setting
223
Cautions on Channel Output Operation
224
Collective Manipulation of To0N Bit
229
Timer Interrupt and To0N Pin Output at Operation Start
230
Timer Input (Ti0N) Control
231
Ti0N Input Circuit Configuration
231
Noise Filter
231
Cautions on Channel Input Operation
232
Independent Channel Operation Function of Timer Array Unit
233
Operation as Interval Timer/Square Wave Output
233
Operation as External Event Counter
239
Operation as Frequency Divider (Channel 0 of Unit 0 Only)
244
Operation as Input Pulse Interval Measurement
248
Operation as Input Signal High-/Low-Level Width Measurement
252
Operation as Delay Counter
256
Simultaneous Channel Operation Function of Timer Array Unit
261
Operation as One-Shot Pulse Output Function
261
Operation as PWM Function
268
Operation as Multiple PWM Output Function
275
Cautions When Using Timer Array Unit
283
Cautions When Using Timer Output
283
Chapter 8 Real-Time Clock
284
Functions of Real-Time Clock
284
Configuration of Real-Time Clock
284
Registers Controlling Real-Time Clock
286
Peripheral Enable Register 0 (PER0)
287
Subsystem Clock Supply Mode Control Register (OSMC)
288
Real-Time Clock Control Register 0 (RTCC0)
289
Real-Time Clock Control Register 1 (RTCC1)
290
Second Count Register (SEC)
292
Minute Count Register (MIN)
292
Hour Count Register (HOUR)
293
Day Count Register (DAY)
295
Week Count Register (WEEK)
296
Month Count Register (MONTH)
297
Year Count Register (YEAR)
297
Watch Error Correction Register (SUBCUD)
298
Alarm Minute Register (ALARMWM)
299
Alarm Hour Register (ALARMWH)
299
Alarm Week Register (ALARMWW)
300
Port Mode Register 3 (PM3)
301
Port Register 3 (P3)
301
Real-Time Clock Operation
302
Starting Operation of Real-Time Clock
302
Shifting to HALT/STOP Mode after Starting Operation
303
Reading/Writing Real-Time Clock
304
Setting Alarm of Real-Time Clock
306
Hz Output of Real-Time Clock
307
Example of Watch Error Correction of Real-Time Clock
308
Chapter 9 12-Bit Interval Timer
313
Functions of 12-Bit Interval Timer
313
Configuration of 12-Bit Interval Timer
313
Registers Controlling 12-Bit Interval Timer
314
Peripheral Enable Register 0 (PER0)
314
Subsystem Clock Supply Mode Control Register (OSMC)
315
Interval Timer Control Register (ITMC)
316
12-Bit Interval Timer Operation
317
12-Bit Interval Timer Operation Timing
317
Start of Count Operation and Re-Enter to HALT/STOP Mode after Returned from
318
HALT/STOP Mode
318
Chapter 10 Clock Output/Buzzer Output Controller
319
Functions of Clock Output/Buzzer Output Controller
319
Configuration of Clock Output/Buzzer Output Controller
321
Registers Controlling Clock Output/Buzzer Output Controller
321
Clock Output Select Registers N (Cksn)
321
Registers Controlling Port Functions of Pins to be Used for Clock or Buzzer Output
323
Operations of Clock Output/Buzzer Output Controller
324
Operation as Output Pin
324
Cautions of Clock Output/Buzzer Output Controller
324
Chapter 11 Watchdog Timer
325
Functions of Watchdog Timer
325
Configuration of Watchdog Timer
326
Register Controlling Watchdog Timer
327
Watchdog Timer Enable Register (WDTE)
327
Operation of Watchdog Timer
328
Controlling Operation of Watchdog Timer
328
Setting Overflow Time of Watchdog Timer
329
Setting Window Open Period of Watchdog Timer
330
Setting Watchdog Timer Interval Interrupt
332
Chapter 12 A/D Converter
333
Function of A/D Converter
333
Configuration of A/D Converter
335
Registers Controlling A/D Converter
337
Peripheral Enable Register 0 (PER0)
338
A/D Converter Mode Register 0 (ADM0)
339
A/D Converter Mode Register 1 (ADM1)
348
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