Renesas RL78 Series User Manual page 847

RL78/G1D
Notes 1. Current flowing into V
V or V . The values below the MAX. column include the peripheral operation current. However, not
DD SS
including the current flowing into the A/D converter, LVD circuit, I/O port, and on-chip pull-up/pull-down
resistors and the current flowing during data flash rewrite.
2. During HALT instruction execution by flash memory.
3. When high-speed on-chip oscillator and subsystem clock are stopped.
4. When high-speed system clock and subsystem clock are stopped.
5. When high-speed on-chip oscillator and high-speed system clock are stopped. When setting ultra-low current
consumption (AMPHS1 = 1). The current flowing into the RTC is included. However, not including the current
flowing into the 12-bit interval timer and watchdog timer.
6. Not including the current flowing into the RTC, 12-bit interval timer, and watchdog timer.
7. Relationship between operation voltage width, operation frequency of CPU and operation mode is as below.
HS (high-speed main) mode: 2.7 V ≤ V
LS (low-speed main) mode:
LV (low-voltage main) mode: 1.6 V ≤ V
8. If operation of the subsystem clock when STOP mode, same as when HALT mode of subsystem clock
operation.
9. The upper value is for square-wave input and the lower is with an oscillator connected.
Remarks 1. f : High-speed system clock frequency (External main system clock frequency)
MX
2. f : High-speed on-chip oscillator clock frequency
IH
3. f : Subsystem clock frequency (XT1 clock oscillation frequency)
SUB
4. Except subsystem clock operation and STOP mode, temperature condition of the TYP. value is T
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
, including the input leakage current flowing when the level of the input pin is fixed to
DD
≤ 3.6 V@1 MHz to 32 MHz
DD
2.4 V ≤ V ≤ 3.6 V@1 MHz to 16 MHz
DD
1.8 V ≤ V ≤ 3.6 V@1 MHz to 8 MHz
DD
≤ 3.6 V@1 MHz to 4 MHz
DD
CHAPTER 30 ELECTRICAL SPECIFICATIONS
= 25°C
A
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