Renesas RL78 Series User Manual page 158

16-bit single-chip microcontrollers
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RL78/G1D
Figure 6-15. Clock Generator Operation When Power Supply Voltage Is Turned On
Lower limit of
the operating
voltage range
VPOR
Power-on reset signal
RESET pin
CPU clock
High-speed on-chip
oscillator clock (f
)
IH
High-speed
system clock (f
)
MX
(when X1 oscillation
selected)
Subsystem clock (f
)
SUB
(when XT1 oscillation
selected)
<1> When the power is turned on, an internal reset signal is generated by the power-on-reset (POR) circuit. Note that
the reset state is maintained after a reset by the voltage detection circuit or an external reset until the voltage
reaches the range of operating voltage described in 30.6 AC Characteristics (the above figure is an example
when the external reset is in use).
<2> When the reset is released, the high-speed on-chip oscillator automatically starts oscillation.
<3> The CPU starts operation on the high-speed on-chip oscillator clock after waiting for the voltage to stabilize and a
reset processing have been performed after reset release.
<4> Set the start of oscillation of the X1 or XT1 clock via software (see 6.6.2 Example of setting X1 oscillation
clock and 6.6.3 Example of setting XT1 oscillation clock).
<5> When switching the CPU clock to the X1 or XT1 clock, wait for the clock oscillation to stabilize, and then set
switching via software (see 6.6.2 Example of setting X1 oscillation clock and 6.6.3 Example of setting XT1
oscillation clock).
Notes 1.
The reset processing time includes the oscillation accuracy stabilization time of the high-speed on-chip
oscillator clock.
2.
When releasing a reset, confirm the oscillation stabilization time for the X1 clock using the oscillation
stabilization time counter status register (OSTC).
3.
For the reset processing time, see CHAPTER 21 POWER-ON-RESET CIRCUIT.
Caution It is not necessary to wait for the oscillation stabilization time when an external clock input from the
EXCLK pin is used.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
At least 10µs
<1>
Reset
<3>
processing time
Note3
<2>
Note 1
<4>
X1 clock
oscillation stabilization time
Starting X1 oscillation
is specified by software.
Starting XT1 oscillation
is specified by software.
CHAPTER 6 CLOCK GENERATOR
Switched by software
<
5
>
High-speed
High-speed on-chip
system clock
oscillator clock
Note 2
<4>
<
5
>
Subsystem
clock
137

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