Renesas RL78 Series User Manual page 645

RL78/G1D
CHAPTER 16 MULTIPLIER AND DIVIDER/MULTIPLY-ACCUMULATOR
16.1 Functions of Multiplier and Divider/Multiply-Accumulator
The multiplier and divider/multiply-accumulator has the following functions.
• 16 bits × 16 bits = 32 bits (Unsigned)
• 16 bits × 16 bits = 32 bits (Signed)
• 16 bits × 16 bits + 32 bits = 32 bits (Unsigned)
• 16 bits × 16 bits + 32 bits = 32 bits (Signed)
• 32 bits ÷ 32 bits = 32 bits, 32-bits remainder (Unsigned)
16.2 Configuration of Multiplier and Divider/Multiply-Accumulator
The multiplier and divider/multiply-accumulator consists of the following hardware.
Table 16-1. Configuration of Multiplier and Divider/Multiply-Accumulator
Item
Multiplication/division data register A (L) (MDAL)
Registers
Multiplication/division data register A (H) (MDAH)
Multiplication/division data register B (L) (MDBL)
Multiplication/division data register B (H) (MDBH)
Multiplication/division data register C (L) (MDCL)
Multiplication/division data register C (H) (MDCH)
Control register Multiplication/division control register (MDUC)
Figure 16-1 shows a block diagram of the multiplier and divider/multiply-accumulator.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
CHAPTER 16 MULTIPLIER AND DIVIDER/MULTIPLY-ACCUMULATOR
Configuration
624