Renesas RL78 Series User Manual page 728

RL78/G1D
Remark f : High-speed on-chip oscillator clock
IH
f : X1 oscillation clock
X
f : External main system clock
EX
f : XT1 oscillation clock
XT
f : External subsystem clock
EXS
f : Low-speed on-chip oscillator clock
IL
Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
RAM Data memory
General-purpose registers
Note During reset signal generation or oscillation stabilization time wait, only the PC contents among the hardware
statuses become undefined. All other hardware statuses remain unchanged after reset.
Remark For the state of the special function register (SFR) after receiving a reset signal, see 4.1.4 Special function
register (SFR) area and 4.1.5 Extended special function register (2nd SFR: 2nd Special Function
Register) area.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Table 20-2. State of Hardware After Receiving a Reset Signal
Hardware
CHAPTER 20 RESET FUNCTION
After Reset
Acknowledgment
The contents of the
reset vector table
(0000H, 0001H) are set.
Undefined
06H
Undefined
Undefined
Note
707