Renesas RL78 Series User Manual page 501

RL78/G1D
Figure 13-83. Example of Contents of Registers for UART Reception of UART
(e) Serial output register m (SOm) ... The register that not used in this mode.
15 14
SOm
0 0
(f) Serial output enable register m (SOEm) ...The register that not used in this mode.
15 14
SOEm
0 0
(g) Serial channel start register m (SSm) ... Sets only the bits of the target channel is 1.
15 14
SSm
0 0
Caution For the UART reception, be sure to set the SMRmr register of channel r to UART Transmission
mode that is to be paired with channel n.
Remarks 1. m: Unit number (m = 0), n: Channel number (n = 1, 3), mn = 01, 03
r: Channel number (r = n – 1), q: UART number (q = 0, 1)
2. : Setting is fixed in the UART reception mode,
×: Bit that cannot be used in this mode (set to the initial value when not used in any mode)
0/1: Set to 0 or 1 depending on the usage of the user
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
(UART0, UART1) (2/2)
13 12 11 10 9
CKOm2 CKOm1
0 0 0
× ×
13 12 11 10 9
0 0 0 0 0
13 12 11 10 9
0 0 0 0 0
CHAPTER 13 SERIAL ARRAY UNIT
8 7 6 5
CKOm0
0 0 0
×
8 7 6 5
0 0 0 0
8 7 6 5
0 0 0 0
: Setting disabled (set to the initial value)
4 3 2 1 0
SOm2 SOm1 SOm0
0 0
× × ×
4 3 2 1 0
SOEm2 SOEm1 SOEm0
0 0
× × ×
4 3 2 1 0
SSm3 SSm2 SSm1 SSm0
0 0/1 0/1
× ×
480