Renesas RL78 Series User Manual page 662

RL78/G1D
17.2 Configuration of DMA Controller
The DMA controller includes the following hardware.
Item
Address registers
Count register
Control registers
17.2.1 DMA SFR address register n (DSAn)
This is an 8-bit register that is used to set an SFR address that is the transfer source or destination of DMA channel n.
Set the lower 8 bits of the SFR addresses FFF00H to FFFFFH.
This register is not automatically incremented but fixed to a specific value.
In the 16-bit tran
sfer mode, the least significant bit is ignored and is treated as an even address.
The DSAn register can be read or written in 8-bit units. However, it cannot be written during DMA transfer.
Reset signal generation clears this register to 00H.
Address: FFFB0H (DSA0), FFFB1H (DSA1), F0200H (DSA2), F0201H (DSA3) After reset: 00H
7
DSAn
Remark n: DMA channel number (n = 0 to 3)
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Table 17-1. Configuration of DMA Controller
● DMA SFR address registers 0 to 3 (DSA0 to DSA3)
● DMA RAM address registers 0 to 3 (DRA0 to DRA3)
● DMA byte count registers 0 to 3 (DBC0 to DBC3)
● DMA mode control registers 0 to 3 (DMC0 to DMC3)
● DMA operation control register 0 to 3 (DRC0 to DRC3)
Figure 17-1. Format of DMA SFR Address Register n (DSAn)
6 5
CHAPTER 17 DMA CONTROLLER
Configuration
4 3 2
R/W
1 0
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