Renesas RL78 Series User Manual page 783

16-bit single-chip microcontrollers
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RL78/G1D
25.4 Setting of Option Byte
The user option byte and on-chip debug option byte can be set using the link option, in addition to describing to the
source. When doing so, the contents set by using the link option take precedence, even if descriptions exist in the source,
as mentioned below.
A software description example of the option byte setting is shown below.
OPT
CSEG
DB
DB
DB
DB
When the boot swap function is used during self programming, 000C0H to 000C3H is switched to 010C0H to 010C3H.
Describe to 010C0H to 010C3H, therefore, the same values as 000C0H to 000C3H as follows.
OPT2
CSEG
DB
DB
DB
DB
Caution To specify the option byte by using assembly language, use OPT_BYTE as the relocation attribute
name of the CSEG pseudo instruction. To specify the option byte to 010C0H to 010C3H in order to
use the boot swap function, use the relocation attribute AT to specify an absolute address.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
OPT_BYTE
; Does not use interval interrupt of watchdog timer,
36H
; Enables watchdog timer operation,
; Window open period of watchdog timer is 50%,
; Overflow time of watchdog timer is 2
; Stops watchdog timer operation during HALT/STOP mode
; Select 1.63 V for V
16H
; Select rising edge 1.88 V, falling edge 1.84 V for V
; Select the interrupt & reset mode as the LVD operation mode
; Select the LS (low speed main) mode as the flash operation mode
AAH
and 8 MHz as the frequency of the high-speed on-chip oscillator
; Enables on-chip debug operation, does not erase flash memory
85H
data when security ID authorization fails
AT
010C0H
; Does not use interval interrupt of watchdog timer,
36H
; Enables watchdog timer operation,
; Window open period of watchdog timer is 50%,
; Overflow time of watchdog timer is 2
; Stops watchdog timer operation during HALT/STOP mode
; Select 1.63 V for V
16H
; Select rising edge 1.88 V, falling edge 1.84 V for V
; Select the interrupt & reset mode as the LVD operation mode
; Select the LS (low speed main) mode as the flash operation mode
AAH
and 1 MHz as the frequency of the high-speed on-chip oscillator
; Enables on-chip debug operation, does not erase flash memory
85H
data when security ID authorization fails
CHAPTER 25 OPTION BYTE
9
/f
,
IL
LVDL
9
/f
,
IL
LVDL
LVDH
LVDH
762

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