RL78/G1D
Figure 13-3. Format of Serial Data Register mn (SDRmn) (mn = 00, 01)
Address: FFF10H, FFF11H (SDR00), FFF12H, FFF13H (SDR01)
15
SDRmn
Remark
For the function of the higher 7 bits of the SDRmn register, see 13.3 Registers Controlling Serial
Array Unit.
Figure 13-4. Format of Serial Data Register mn (SDRmn) (mn = 02, 03, 10, 11)
Address: FFF44H, FFF45H (SDR02), FFF46H, FFF47H (SDR03),
FFF48H, FFF49H (SDR10), FFF4AH, FFF4BH (SDR11)
15
SDRmn
Caution Be sure to clear bit 8 to "0".
Remark
For the function of the higher 7 bits of the SDRmn register, see 13.3 Registers Controlling Serial
Array Unit.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
FFF11H (SDR00)
14
13
12
11
10
Shift register
FFF45H (SDR02)
14
13
12
11
10
Shift register
CHAPTER 13 SERIAL ARRAY UNIT
After reset: 0000H
9
8
7
6
5
8
7
6
5
After reset: 0000H
9
8
7
6
5
0
8
7
6
5
R/W
FFF10H (SDR00)
4
3
2
1
4
3
2
1
R/W
FFF44H (SDR02)
4
3
2
1
4
3
2
1
0
0
0
0
375