Renesas RL78 Series User Manual page 466

16-bit single-chip microcontrollers
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RL78/G1D
(Essential)
(Essential)
(Selective)
(Selective)
(Selective)
(Selective)
(Essential)
(Essential)
Remark
If PER0 is rewritten while stopping the master transmission and the clock supply is stopped, wait
until the transmission target (master) stops or transmission finishes, and then perform initialization
instead of restarting the transmission.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Figure 13-59. Procedure for Resuming Slave Reception
Starting setting for resumption
No
Completing master
preparations?
Yes
Port manipulation
Changing setting of the SPSm register
Changing setting of the SMRmn register
Changing setting of the SCRmn register
Clearing error flag
Port manipulation
Writing to the SSm register
Completing resumption setting
CHAPTER 13 SERIAL ARRAY UNIT
Wait until stop the communication target
(master)
Disable clock output of the target
channel by setting a port register and a
port mode register.
Re-set the register to change the
operation clock setting.
Re-set the register to change serial
mode register mn (SMRmn) setting.
Re-set the register to change serial
communication operation setting register
mn (SCRmn) setting.
If the OVF flag remain set, clear this
using serial flag clear trigger register mn
(SIRmn).
Enable clock output of the target channel
by setting a port register and a port mode
register.
Set the SSmn bit of the target channel to 1
(SEmn bit = 1: to enable operation). Wait
for a clock from the master.
445

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