Renesas RL78 Series User Manual page 182

RL78/G1D
Timer array unit channels
Channel 0
Channel 1
Channel 2
Channel 3
Unit 0
Channel 4
Channel 5
Channel 6
Channel 7
Remarks 1. When timer input and timer output are shared by the same pin, either only timer input or only timer
output can be used.
2. "( )" indicates an alternate port when the bit 0 of the peripheral I/O redirection register (PIOR) is set to "1".
Figure 7-1 shows the block diagrams of the timer array unit.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Table 7-2. Timer I/O Pins provided in Each Product
CHAPTER 7 TIMER ARRAY UNIT
I/O Pins of Each Product
P00/TI00, P01/TO00
P16/TI01/TO01
P15/(TI02/TO02)
P14/(TI03/TO03)
P13/(TI04/TO04)
P12/(TI05/TO05)
P11/(TI06/TO06)
P10/(TI07/TO07)
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