Renesas RL78 Series User Manual page 753

RL78/G1D
22.5 Cautions for Voltage Detector
(1) In a system where the supply voltage (V
the system may be repeatedly reset and released from the reset status. In this case, the time from release of reset to
the start of the operation of the microcontroller can be arbitrarily set by taking the following action.
<Action>
After releasing the reset signal, wait for the supply voltage fluctuation period of each system by means of a software
counter that uses a timer, and then initialize the ports.
When a reset occurs, check the reset source by using the following method.
Figure 22-10. Example of Software Processing If Supply Voltage Fluctuation is 50 ms or Less in Vicinity of LVD
Note
No
Note If reset is generated again during this period, initialization processing <2> is not started.
Remark m = 0, 1
n = 0 to 7
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
) fluctuates for a certain period in the vicinity of the LVD detection voltage,
DD
Detection Voltage
Reset
Initialization
processing <1>
Setting timer array unit
(to measure 50 ms)
Clearing WDT
50 ms have passed?
(TMIFmn = 1?)
Yes
Initialization
processing <2>
CHAPTER 22 VOLTAGE DETECTOR
See Figure 19-5 Procedure for Checking Reset Resource.
; e.g. f = High-speed on-chip oscillator clock (4.04 MHz (MAX.))
CLK
Source: f = (4.04 MHz (MAX.))/2
MCK
where comparison value = 789: ≈ 50 ms
Timer starts (TSmn = 1).
; Initial setting for port.
Setting of division ratio of system clock,
such as setting of timer or A/D converter.
8
,
732