Renesas RL78 Series User Manual page 812

RL78/G1D
28.3 BCD Correction Circuit Operation
The basic operation of the BCD correction circuit is as follows.
(1) Addition: Calculating the result of adding a BCD code value and another BCD code value by using a BCD code
value
<1> The BCD code value to which addition is performed is stored in the A register.
<2> By adding the value of the A register and the second operand (value of one more BCD code to be added) as
are in binary, the binary operation result is stored in the A register and the correction value is stored in the BCD
correction result register (BCDADJ).
<3> Decimal correction is performed by adding in binary the value of the A register (addition result in binary) and the
BCDADJ register (correction value), and the correction result is stored in the A register and CY flag.
Caution The value read from the BCDADJ register varies depending on the value of the A register
when it is read and those of the CY and AC flags. Therefore, execute the instruction <3> after
the instruction <2> instead of executing any other instructions. To perform BCD correction in
the interrupt enabled state, saving and restoring the A register is required within the interrupt
function. PSW (CY flag and AC flag) is restored by the RETI instruction.
Examples are shown below.
Example 1. 99 + 89 = 188
Instruction
MOV A, #99H
ADD A, #89H
ADD A, !BCDADJ
Example 2. 85 + 15 = 100
Instruction
MOV A, #85H
ADD A, #15H
ADD A, !BCDADJ
Examples 3. 80 + 80 = 160
Instruction
MOV A, #80H
ADD A, #80H
ADD A, !BCDADJ
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
A Register
; <1> 99H
; <2> 22H
88H
; <3>
A Register
; <1> 85H
; <2> 9AH
00H
; <3>
A Register
; <1> 80H
00H
; <2>
60H
; <3>
CHAPTER 28 BCD CORRECTION CIRCUIT
CY Flag AC Flag
– –
1 1
1 0
CY Flag AC Flag
– –
0 0
1 1
CY Flag AC Flag
– –
1 0
1 0
BCDADJ
Register
–
66H
–
BCDADJ
Register
–
66H
–
BCDADJ
Register
–
60H
–
791