Renesas RL78 Series User Manual page 833

RL78/G1D
Instruction
Mnemonic
Group
Condition BF saddr.bit, $addr20
al branch
sfr.bit, $addr20
A.bit, $addr20
PSW.bit, $addr20
[HL].bit, $addr20
ES:[HL].bit,
$addr20
BTCLR saddr.bit, $addr20
$addr20
$addr20
PSW.bit, $addr20
[HL].bit, $addr20
ES:[HL].bit,
$addr20
Conditional SKC
skip
SKNC
SKZ
SKNZ
SKH
SKNH
Note4
CPU SEL RBn
control
NOP
EI
DI
HALT
STOP
Notes 1. Number of CPU clocks (f
when no data is accessed.
2. Number of CPU clocks (f
accessed by an 8-bit instruction.
3. This indicates the number of clocks "when condition is not met/when condition is met".
4. n indicates the number of register banks (n = 0 to 3).
Remark Number of clock is when program exists in the internal ROM (flash memory) area. If fetching the instruction
from the internal RAM area, the number becomes double number plus 3 clocks at a maximum.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Table 29-5. Operation List (17/17)
Operands Bytes
Note 1 Note 2
4 3/5
4 3/5
3 3/5
4 3/5
3 3/5
4 4/6
4 3/5
4 3/5
3 3/5
4 3/5
3 3/5
4 4/6
– 2
– 2
– 2
– 2
– 2
– 2
2
– 1
– 3
– 3
– 2
– 2
) when the internal RAM area, SFR area, or extended SFR area is accessed, or
CLK
) when the code flash memory is accessed, or when the data flash memory is
CLK
Clocks
Note3
– PC ← PC + 4 + jdisp8 if (saddr).bit = 0
Note3
– PC ← PC + 4 + jdisp8 if sfr.bit = 0
Note3
– PC ← PC + 3 + jdisp8 if A.bit = 0
Note3
– PC ← PC + 4 + jdisp8 if PSW.bit = 0
Note3
6/7 PC ← PC + 3 + jdisp8 if (HL).bit = 0
Note3
7/8 PC ← PC + 4 + jdisp8 if (ES, HL).bit = 0
Note3
– PC ← PC + 4 + jdisp8 if (saddr).bit = 1
then reset (saddr).bit
Note3
– PC ← PC + 4 + jdisp8 if sfr.bit = 1
then reset sfr.bit
Note3
– PC ← PC + 3 + jdisp8 if A.bit = 1
then reset A.bit
Note3
– PC ← PC + 4 + jdisp8 if PSW.bit = 1
then reset PSW.bit
Note3
– PC ← PC + 3 + jdisp8 if (HL).bit = 1
then reset (HL).bit
Note3
– PC ← PC + 4 + jdisp8 if (ES, HL).bit = 1
then reset (ES, HL).bit
1 – Next instruction skip if CY = 1
1 – Next instruction skip if CY = 0
1 – Next instruction skip if Z = 1
1 – Next instruction skip if Z = 0
1 – Next instruction skip if (Z⋁ CY)=0
1 – Next instruction skip if (Z⋁ CY)=1
1 – RBS[1:0] ← n
1 – No Operation
4 – IE ← 1 (Enable Interrupt)
4 – IE ← 0 (Disable Interrupt)
3 – Set HALT Mode
3 – Set STOP Mode
CHAPTER 29 INSTRUCTION SET
Operation Flag
Z AC CY
× × ×
812