RL78/G1D
Figure 7-43. Operation Procedure of Interval Timer/Square Wave Output Function (2/2)
To hold the TO0n pin output level
TAU
Clears the TO0n bit to 0 after the value to
stop
be held is set to the port register.
When holding the TO0n pin output level is not necessary
Setting not required.
The TAUmEN bit of the PER0 register is cleared to 0.
Remark m: Unit number (m = 0), n: Channel number (n = 0 to 7)
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Software Operation
CHAPTER 7 TIMER ARRAY UNIT
Hardware Status
The TO0n pin output level is held by port function.
Power-off status
All circuits are initialized and SFR of each channel is also
initialized.
(The TO0n bit is cleared to 0 and the TO0n pin is set to
port mode.)
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