Renesas RL78 Series User Manual page 480

16-bit single-chip microcontrollers
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RL78/G1D
(1) SNOOZE mode operation (once startup)
Figure 13-70. Timing Chart of SNOOZE Mode Operation (once startup) (Type 1: DAPmn = 0, CKPmn = 0)
CPU operation status
Normal operation
SS00
<1>
ST00
SE00
SWC0
SSEC0
L
Clock request signal
(internal signal)
SDR00
SCK00 pin
SI00 pin
Shift register 00
INTCSI00
TSF00
Note
Only read received data while SWCm = 1 and before the next valid edge of the SCKp pin input is detected.
Cautions 1.
Before switching to the SNOOZE mode or after reception operation in the SNOOZE mode
finishes, set the STm0 bit to 1 (clear the SEm0 bit and stop the operation).
2.
When SWCm = 1, the BFFm0 and OVFm0 flags will not change.
Remarks 1. <1> to <11> in the figure correspond to <1> to <11> in Figure 13-71 Flowchart of SNOOZE Mode
Operation (once startup).
2. m = 0; p = 00
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
STOP mode
<4>
<3>
Reception & shift operation
Data reception
<2>
<5><6>
CHAPTER 13 SERIAL ARRAY UNIT
SNOOZE mode
<9>
<10>
<8>
Read
Receive data 1
<7>
Normal operation
<11>
Receive data 2
Receive data 1
Note
Receive data 2
Reception & shift operation
Data reception
459

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