Renesas RL78 Series User Manual page 198

RL78/G1D
Address: F0190H, F0191H (TMR00) to F019EH, F019FH (TMR07)
Symbol 15 14
TMRmn CKS CKS
mn1 mn0
(mn = 02,
04, 06)
Symbol 15 14
TMRmn CKS CKS
mn1 mn0
(mn = 01,
03)
Symbol 15 14
TMRmn CKS CKS
mn1 mn0
(mn = 00,
05, 07)
MD MD
mn3 mn2
0 0
0 1
0 1
1 0
1 1
Other than above
The operation of each mode varies depending on MDmn0 bit (see the table below).
(Value set by the MDmn3 to MDmn1 bits
(see the table above))
● Interval timer mode (0, 0, 0)
● Capture mode (0, 1, 0)
● Event counter mode (0, 1, 1)
● One-count mode
● Capture & one-count mode (1, 1, 0)
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Figure 7-11. Format of Timer Mode Register mn (TMRmn) (4/4)
13 12 11 10
0 0 MAST STS
ERmn mn2
13 12 11 10
0 0 SPLIT STS
mn mn2
13 12 11 10
Note
0 CCS 0 STS
1
mn mn2
MD Operation mode of channel n
mn1
0 Interval timer mode
0 Capture mode
1 Event counter mode
0 One-count mode
0 Capture & one-count mode
Setting prohibited
Operation mode
Note 2
(1, 0, 0)
Other than above
After reset: 0000H
9 8 7 6
STS STS CIS CIS
mn1 mn0 mn1 mn0
9 8 7 6
STS STS CIS CIS
mn1 mn0 mn1 mn0
9 8 7 6
STS STS CIS CIS
mn1 mn0 mn1 mn0
Corresponding function
Interval timer / Square wave
output / Divider function / PWM
output (master)
Input pulse interval
measurement
External event counter
Delay counter / One-shot pulse
output / PWM output (slave)
Measurement of high-/low-level
width of input signal
MD
Setting of starting counting and interrupt
mn0
Timer interrupt is not generated when counting is started
0
(timer output does not change, either).
1 Timer interrupt is generated when counting is started
(timer output also changes).
0 Timer interrupt is not generated when counting is started
(timer output does not change, either).
0 Start trigger is invalid during counting operation.
At that time, interrupt is not generated.
Start trigger is valid during counting operation
1
At that time, interrupt is not generated.
0 Timer interrupt is not generated when counting is started
(timer output does not change, either).
Start trigger is invalid during counting operation.
At that time interrupt is not generated.
Setting prohibited
CHAPTER 7 TIMER ARRAY UNIT
R/W
5 4 3 2
0 0 MD MD
mn3 mn2 mn1
5 4 3 2
0 0 MD MD
mn3 mn2 mn1
5 4 3 2
0 0 MD MD
mn3 mn2 mn1
Count operation of
TCR
Counting down
Counting up
Counting down
Counting down
Counting up
Note 3
1 0
MD MD
mn0
1 0
MD MD
mn0
1 0
MD MD
mn0
.
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