Renesas RL78 Series User Manual page 461

16-bit single-chip microcontrollers
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RL78/G1D
Figure 13-55. Flowchart of Slave Transmission (in Continuous Transmission Mode)
Write 1 to MDmn0 bit
Remark
<1> to <6> in the figure correspond to <1> to <6> in Figure 13-54
Transmission (in Continuous Transmission Mode).
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Starting setting
<1>
SAU default setting
Setting transmit data
Enables interrupt
Writing transmit data to
<2>
SIOp (=SDRmn[7:0])
Wait for transmit completes
<3>
<5>
Buffer empty/transfer end interrupt
Number of transmit
data > 1?
Yes
Reading transmit data
Writing transmit data to
SIOp (=SDRmn[7:0])
Subtract -1 from number of
transmit data
RETI
No
Number of communication
data = -1?
Yes
Yes
Communication continued?
No
Disable interrupt (MASK)
<6>
Write 1 to STmn bit
End of communication
CHAPTER 13 SERIAL ARRAY UNIT
For the initial setting, refer to Figure 13-48.
(Select buffer empty interrupt)
Set storage area and the number of data for transmit data
(Storage area, Transmission data pointer, Number of communication data and
Communication end flag are optionally set on the internal RAM by the software)
Clear interrupt request flag (XXIF), reset interrupt mask (XXMK) and set
interrupt enable (EI)
Read transmit data from buffer and write it to SIOp. Update transmit
data pointer
Start communication when master start providing the
clock
When buffer empty/transfer end interrupt is generated,
it moves to interrupt processing routine
No
If transmit data is left, read them from storage area then write into
SIOp, and update transmit data pointer.
If not, change the interrupt to transmission complete
<4>
Clear MDmn0 bit to 0
It is determined as follows depending on the number of communication data.
+1:
Transmit data completion
0:
During the last data received
-1:
All data received completion
Timing Chart of Slave
440

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