Renesas RL78 Series User Manual page 187

16-bit single-chip microcontrollers
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RL78/G1D
The count value can be read by reading timer count register mn (TCRmn).
The count value is set to FFFFH in the following cases.
● When the reset signal is generated
● When the TAUmEN bit of peripheral enable register 0 (PER0) is cleared
● When counting of the slave channel has been completed in the delay count mode
● When counting of the master/slave channel has been completed in the one-shot pulse output mode
The count value is cleared to 0000H in the following cases.
● When the start trigger is input in the capture mode
● When capturing has been completed in the capture mode
Caution The count value is not captured to timer data register mn (TDRmn) even when the TCRmn
register is read.
The TCRmn register read value differs as follows according to operation mode changes and the operating status.
Table 7-3. Timer Count Register mn (TCRmn) Read Value in Various Operation Modes
Operation Mode
Count Mode
Interval timer
Count down
mode
Capture mode
Count up
Event counter
Count down
mode
One-count mode
Count down
Capture & one-
Count up
count mode
Note This indicates the value read from the TCRmn register when channel n has stopped operating as a timer (TEmn = 0)
and has been enabled to operate as a counter (TSmn = 1). The read value is held in the TCRmn register until the
count operation starts.
Remark
m: Unit number (m = 0), n: Channel number (n = 0 to 7)
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Timer count register mn (TCRmn) Read Value
Value if the
Value if the Operation
operation mode
was restarted after
was changed after
count operation
releasing reset
paused (TTmn = 1)
FFFFH
0000H
FFFFH
FFFFH
0000H
CHAPTER 7 TIMER ARRAY UNIT
Value if the operation
mode was changed
after count operation
paused (TTmn = 1)
Value if stop
Undefined
Value if stop
Undefined
Value if stop
Undefined
Value if stop
Undefined
Value if stop
Undefined
Note
Value when waiting
for a start trigger
after one count
FFFFH
Capture value of
TDRmn register + 1
166

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