Renesas RL78 Series User Manual page 67

RL78/G1D
● Processor mode control register (PMC)
This register sets the flash memory space for mirroring to area from F0000H to FFFFFH.
The PMC register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Figure 4-4. Format of Configuration of Processor Mode Control Register (PMC)
Address: FFFFEH After reset: 00H R/W
Symbol
PMC
Caution After setting the PMC register, wait for at least one instruction and access the mirror area.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
7 6 5
0 0 0
MAA Selection of flash memory space for mirroring to area from F0000H to FFFFFH
0 00000H to 0FFFFH is mirrored to F0000H to FFFFFH
1 10000H to 1FFFFH is mirrored to F0000H to FFFFFH
CHAPTER 4 CPU ARCHITECTURE
4 3 2
0 0 0
1 <0>
0 MAA
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