Renesas RL78 Series User Manual page 438

16-bit single-chip microcontrollers
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RL78/G1D
Figure 13-37. Flowchart of Master Reception (in Single-Reception Mode)
No
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Starting CSI communication
SAU default setting
Setting receive data
Enables interrupt
Writing dummy data to
SIOp (=SDRmn[7:0])
Wait for receive completes
Transfer end interrupt
generated?
Reading receive data from
SIOp (=SDRmn[7:0])
RETI
All reception completed?
Yes
Disable interrupt (MASK)
Write 1 to STmn bit
End of communication
CHAPTER 13 SERIAL ARRAY UNIT
For the initial setting, refer to Figure 13-32.
(Select Transfer end interrupt)
Setting storage area of the receive data, number of communication data
(Storage area, Reception data pointer, Number of communication data and
Communication end flag are optionally set on the internal RAM by the software)
Clear interrupt request flag (XXIF), reset interrupt mask (XXMK) and set
interrupt enable (EI)
Writing to SIOp makes SCKp signals out
(communication starts)
When transfer end interrupt is generated, it moves
to interrupt processing routine
Read receive data then writes to storage area.
Update receive data pointer and number of
communication data.
Check the number of communication data
417

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