Renesas RL78 Series User Manual page 359

16-bit single-chip microcontrollers

Hide thumbs Also See for RL78 Series:

Table of Contents

Figure 12-15. Conversion Operation of A/D Converter (Software Trigger Mode)

1 is written to ADCS

A/D converter

In one-shot conversion mode, the ADCS bit is automatically cleared to 0 after completion of A/D conversion.

In sequential conversion mode, A/D conversion operations proceed continuously until the software clears bit 7 (ADCS)

of the A/D converter mode register 0 (ADM0) to 0.

Writing to the analog input channel specification register (ADS) during A/D conversion interrupts the current conversion

after which A/D conversion of the analog input specified by the ADS register proceeds. Data from the A/D conversion that

was in progress are discarded.

Reset signal generation clears the A/D conversion result register (ADCR, ADCRH) to 0000H or 00H.

R01UH0515EJ0120 Rev.1.20

Dec 16, 2016

Conversion time

CHAPTER 12 A/D CONVERTER

A/D conversion

Rl78/g1d R5f11agg R5f11agh R5f11agj