RL78/G1D
Figure 16-8. Timing Diagram of Multiply-Accumulation (Unsigned) Operation
Operation clock
<1>
MDUC
00H
40H
MDSM L
MDCH
0000H
MDCL
0000H
MDAL
0000H
MDAH
0000H
MDBH
0000H
MDBL
0000H
INTMD
MACOF
MACSF
L
<2>
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
CHAPTER 16 MULTIPLIER AND DIVIDER/MULTIPLY-ACCUMULATOR
→
(2 × 3 + 3 = 9
32767 × 2 + 4294901762 = 0 (over flow generated))
0003H
0002H
0003H
<3>
<4>
<5> <6>
FFFFH
0009H
<8>, <9>
0000H
0006H
<7>
<2>
<3>
0002H
7FFFH
<10>
<4>
<5> <6>
<7>
44H
0000H
0000H
0002H
0000H
FFFEH
635