Renesas RL78 Series User Manual page 139

RL78/G1D
Figure 6-2. Format of Clock Operation Mode Control Register (CMC)
Address: FFFA0H
Symbol 7
CMC EXCLK
EXCLK
0
0
1
1
EXCLKS
0
0
1
1
AMPHS1
0
0
1
1
AMPH
0
1
Cautions 1.
(Cautions and Remark are given on the next page.)
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
After reset: 00H R/W
6 5
OSCSEL EXCLKS
OSCSEL High-speed system clock
pin operation mode
0 Input port mode
1 X1 oscillation mode
0 Input port mode
1 External clock input mode
OSCSELS Subsystem clock pin
operation mode
0 Input port mode
1 XT1 oscillation mode
0 Input port mode
1 External clock input mode
AMPHS0
0 Low power consumption oscillation (default)
1 Normal oscillation
0 Ultra-low power consumption oscillation
1 Setting prohibited
1 MHz ≤ f ≤ 10 MHz
X
10 MHz < f ≤ 20 MHz
X
The CMC register can be written only once after reset release, by an 8-bit memory
manipulation instruction. When using the CMC register with its initial value (00H),
be sure to set the register to 00H after a reset ends in order to prevent malfunction
due to a program loop. Such a malfunction becomes unrecoverable when a value
other than 00H is mistakenly written.
2. After reset release, set the CMC register before X1 or XT1 oscillation is started as
set by the clock operation status control register (CSC).
3. Be sure to set the AMPH bit to 1 if the X1 clock oscillation frequency exceeds 10
MHz.
4. Specify the settings for the AMPH, AMPHS1, and AMPHS0 bits while f
as f after a reset ends (before f
CLK
5. Oscillation stabilization time of f
6. Although the maximum system clock frequency is 32 MHz, the maximum frequency
of the X1 oscillator is 20 MHz.
CHAPTER 6 CLOCK GENERATOR
4 3
OSCSELS 0
X1/P121 pin
Input port
Crystal/ceramic resonator connection
Input port
Input port
XT1/P123 pin
Input port
Crystal resonator connection
Input port
Input port
XT1 oscillator oscillation mode selection
Control of X1 clock oscillation frequency
is switched to f
CLK
, counting on the software.
XT
2 1
AMPHS1 AMPHS0 AMPH
X2/EXCLK/P122 pin
External clock input
XT2/EXCLKS/P124 pin
External clock input
or f ).
MX sub
0
is selected
IH
118